Vishal Khatri

Ambitious Electrical Engineer with record of continuously exceeding both company and personal goals. Expertise includes Cadence Virtuoso for circuit design and Mixed Signal Verification. Extensive knowledge of electrical engineering design and applications. Eager to contribute to team success through hard work, attention to detail and excellent organizational skills. Dynamic Analog Design Engineer with strong track record developing high-speed analog integrated circuits in latest FinFET process nodes. In-depth knowledge and analytical understanding of mixed-signal design techniques. Proven experience in cutting-edge circuit development and delivering products to market. Detail-oriented team player with strong organizational skills. Ability to handle multiple projects simultaneously with a high degree of accuracy. Organized and dependable candidate successful at managing multiple priorities with a positive attitude. Willingness to take on added responsibilities to meet team goals.

DESIGN OF DIRECT CONVERSION RECEIVER AT 2.15GHZ(APRIL 2019-JUNE 2019)

-Consisting of noise cancelling R feedback LNA, current mode passive mixer, op-amp based TIA and LO divider at 25% duty cycle

-Achieved a Noise Figure (DSB) of 2.5dB and a current consumption of 10mA at 30dB gain & 1MHz BW in 180nm node

DESIGN OF LOW POWER TEMPERATURE SENSOR FOR BIOMEDICAL APPLICATIONS(SEPTEMBER 2018-DECEMBER 2018)

-Low power senor at 0.8V employing resistive frequency locked oscillator implementation and digital counter in 180nm node

-Coefficient of correlation post linear regression was R=0.8945

DESIGN OF DIGITAL CIRCUITS USING CNT(CARBON NANOTUBE) FETS(AUGUST 2014-MAY 2015)

- Designed 4,8,12 and 16bit multipliers using HSpice and sized DG, DOMINO and TSPC topologies for CNTFET multipliers

-Compared and analyzed the sizing of circuits using CMOS and CNTFET topologies for optimum Power Delay Product

- Presented a Review Paper on CNTFET Ternary Circuits in APOGEE 2015 (Annual Technical Festival, BITS Pilani)

1) Kossel, Marcel; Khatri, Vishal ; 2018; Decision Feedback Equalizer, USPTO 16/033704.

2) Kossel, Marcel; Khatri,, Vishal; Francese, Pier Andrea ; Braendli, Matthias ; 2021; Clock divider with quadrature error correction, USPTO 11057039

3) Vishal Khatri; Tamal Das; Umamaheswara Reddy Katta; 2023; Method and wire-line transceiver for performing serial loop back test, USPTO 20230283503A1

4) Umamaheswara Reddy Katta; Tamal Das; Vishal Khatri; Ankur Ghosh; 2023 ; Electronic device and method for controlling slew rate for high-speed data communications , USPTO US20230283283A1

Journals

1) A. S. Yonar et al., "An In-Comparator Aperture-Time Equalization in a 7-nm FinFET CMOS 40-Gb/s Receiver," in IEEE Solid-State Circuits Letters, vol. 3, pp. 94-97, 2020.

2) Immanuel Raja; Vishal Khatri; Zaira Zahir and Gaurab Banerjee, "A 0.1-2-GHz Quadrature Correction Loop for Digital Multiphase Clock Generation Circuits in 130-nm CMOS," in IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, Mar 2017.

3) Vishal Khatri, Gaurab Banerjee, “A 0.25–3.25-GHz Wideband CMOS-RF Spectrum Sensor for Narrowband Energy Detection," in IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, Sept. 2016.

4) Vishal Khatri, Gaurab Banerjee, “A Mitigation Technique for Harmonic Downconversion in Wideband Spectrum Sensors.”, IEEE Transactions on Instrumentation & Measurement. Dec 2015.

5) Vishal Khatri, Gaurab Banerjee, “A 0.5-2GHz Injection locked oscillator cascade for parallel wideband RF spectrum sensing”, Springer, Analog Integrated Circuits and Signal Processing, July 2015.

Conference

1) M. A. Kossel  , V. Khatri et al., "8.3 An 8b DAC-Based SST TX Using Metal Gate Resistors with 1.4pJ/b Efficiency at 112Gb/s PAM-4 and 8-Tap FFE in 7nm CMOS," 2021 IEEE International Solid- State Circuits Conference (ISSCC), 2021

2) V. Jain, S. K. Gupta, V. Khatri and G. Banerjee, "A 19.3-24.8 GHz Dual-Slope VCO in 65-nm CMOS for Automotive Radar Applications," 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID), Delhi, NCR, India, 2019

3) Manas Kumar Lenka, Akash Agrawal, Vishal Khatri and Gaurab Banerjee, "A Wide-Band Receiver Front-End with Programmable Frequency Selective Input Matching," 29th International Conference on VLSI Design, Kolkata, 2016, pp. 168-173

4) Vishal Khatri, Gaurab Banerjee, “Complex filter-based spectrum sensor for narrowband detection over a wide sensing bandwidth”, in IEEE CONNECT 2015.

5) Javed. G.S, Vishal Khatri, Immanuel Raja, Manas Lenka, Gaurab Banerjee, “Differential Multiphase DLL for Reconfigurable Radio Frequency Synthesizer”, IEEE CONNECT 2014.

6) Sarveswara, T.; Khatri, V.; Shanmugam, G.; Terry, M.; "DFM aware bridge pair extraction for manufacturing test development," IEEE International Test Conference (ITC), 2010, 2-4 Nov. 2010 (Poster Publication)

1) Reviewer for IEEE Transactions on Instrumentation and Measurement, IEEE Transactions on VLSI Systems, IEEE Transactions on Circuits and Systems -II, IEEE ISCAS, IEEE VLSID, IEEE MWCAS.

2) Member, Executive Committee; IEEE Circuits and Systems Chapter, Bangalore (2020 – 2022).

3) Technical program committee member for ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED-2019/ISLPED-2021/ISLPED-2022, /ISLPED-2023).

4) Technical program committee member for 31st International Conference on VLSI Design, 2018.