PETER JOHN ELLIS
Framlingham / Woodbridge,Suffolk
Summary
Experienced professional with expertise in Indium Phosphide, Gallium Arsenide, Silicon, and Lithium Niobate substrates, excelling in process development and optimisation using DOE and SPC methodologies. Specialises in device processing, photolithography, and wafer preparation. Demonstrates strong skills in device failure analysis and equipment development. Focused on enhancing process implementation and equipment documentation to foster industry innovation.
Overview
24
24
years of professional experience
Work history
Senior process engineer
Huawei R&D
Martlesham, Ipswich, Suffolk
2017.10 - Current
- Provide technical support to project teams for day-to-day decisions.
- Evaluate current processes and log improvement opportunities for operational excellence.
- Perform defect root-cause analysis and implement corrective actions to prevent repeats.
- Developed standard operating procedures ensuring consistency in operations.
- Liaised with stakeholders to progress projects and meet project goals.
- Increased staff competency levels through proactive training and mentoring initiatives.
- Reviewed technical documents for accuracy and completeness.
- New tool characterisation and process integration.
- Device processing using InP, GaAs and Silicon substrates
- Photolithography, Wet and Dry etching
- Working within clean room and adhering to required protocol.
- Established preventive maintenance programmes, reducing equipment downtime.
- Optimised production processes to maximise return on investment.
Process Engineer
XAAR
Huntingdon, Cambridgeshire
2010.08 - 2017.09
- Provided engineering support to production, ensuring operational efficiency and problem resolution.
- Coordinated start-up of new electroless plating line and parylene deposition chambers
- Process development of electroless plating and parylene processes
- Utilised SPC to monitor and maintain process stability, contributing to consistent product quality.
- Development and definition of analysis techniques
- Setting up wet and dry etching processes
- Device failure analysis
- Use of 8D for root cause failure analysis
- Optimization and control of processes through use of DOE and analysis.
- Use of control plans, validation plans and PFMEA
- Use of mini-tab and JMP for data analysis.
- Managed project tasks, ensuring completion within deadlines and budget constraints, facilitating project success.
- Reduced waste generation by implementing lean manufacturing principles.
- Improved manufacturing efficiency by implementing upgraded processes and systems.
- Identified manufacturing issues quickly to minimise lost time and resources.
Senior Process Engineer
DYNEX SEMICONDUCTORS
Lincoln, , LIncolnshire
2009.08 - 2010.08
- Coordinated start-up of PECVD and PVD processes for transition from 4-inch to 6-inch manufacturing
- Process development of PECVD and PVD processes
- Implemented statistical process control (SPC) to monitor and maintain process performance
- Investigated production non-conformance and implemented procedural changes
- Maintained wet and dry etching processes to ensure operational efficiency
- Analysis of thin films using optical and electron microscopes
- Supported production through daily engineering assistance
- Training of new operators
- Developed standard operating procedures ensuring consistency in operations.
- Monitored design progress to ensure manufacturing feasibility.
Senior Process Engineer
SIA GROGLASS
Riga
2007.10 - 2009.05
- Coordinated start-up of new in-line production coater, developing SOPs and maintenance procedures for operational efficiency.
- Conducted failure analysis to identify root causes of coating issues.
- Collaborated with product development team to create innovative coated glass products, enhancing product offerings.
- Investigation of glass tempering and its effect on thin film coatings on glass
- Utilised optical design software (CODE) to refine coatings based on feedback from characterised films, optimising performance.
- Development of specific optical material characteristics by use of DOE
- Preparing R & D sample of thin film coatings for characterisation
Process Engineer
PLASMON DATA SYSTEMS
Melbourne, Cambridgeshire
2002.01 - 2007.04
- Process optimization through experimental design and continual enhancement through data analysis
- Development of protective coating for sputtering shields which resulted in 4X improvement in cycle time.
- Conducted thin film development and maintained process stability
- Characterization of thin film deposition.
- Monitored processes and equipment using SPC and KPIs to ensure operational reliability
- Provides day-to-day engineering support to production.
- Facilitated effective communication between production and development teams to align project goals
- Conducted failure analysis on returned customer products to identify root causes and recommend improvements
- Ensuring that production conforms to current health and safety legislation
- Monitor cleanroom by performing particle counts and airflow measurements.
Education
Masters Degree - Material Science
North Carolina State University
Raleigh, USAHNC in Electronics - Electronics
Chelmer institute of Higher education
Chelmsford, EssexONC in Electronics - Electronics
Chelmer institute of Higher education
Chelmsford, EssexSkills
Electronic materials deposition
- Device processing techniques
- Electroless plating (Copper & Nickel)
- Wet and Dry Etching
- Photolithography
- Device failure analysis
- Process optimisation
- Process implementation
- Process efficiency
- Risk assessment proficiency
- Equipment development
- Equipment documentation
- Procedure evaluation
- Interdepartmental coordination
- Effective mentoring and coaching
Affiliations
- Fishing
- Cooking
- Looking after my disabled wife
- Listening to music
- Reading
- Playing video games
Accomplishments
I have co-authored 9 papers and 4 patents.
References
References available upon request.
Training
- Emergency Response Team
- Risk Assessment
- BOC Hazardous Gas Handling
- Practical Microlithography with DOE and SPC
- Chemical Handling
- Basic Experiment Strategies: Experimental Strategies for process Variables (DOE)
- PVD - Sputtering and Electron beam deposition
- CVD
- Diffusion
- Photolithography
- RIE
- SEM
- SPC
- MES systems
- Breathing Apparatus
- Optical microscopy
- Atomic force microscopy
- PFMEA
- 8D
- Minitab
Timeline
Senior process engineer
Huawei R&D
2017.10 - Current
Process Engineer
XAAR
2010.08 - 2017.09
Senior Process Engineer
DYNEX SEMICONDUCTORS
2009.08 - 2010.08
Senior Process Engineer
SIA GROGLASS
2007.10 - 2009.05
Process Engineer
PLASMON DATA SYSTEMS
2002.01 - 2007.04
Masters Degree - Material Science
North Carolina State University
HNC in Electronics - Electronics
Chelmer institute of Higher education
ONC in Electronics - Electronics
Chelmer institute of Higher education